Create a small passive RC low-pass filter, then review its schematic, footprints, routing, and exported files. You create the project yourself; this guide does not require a downloaded example.
What We're Building
- R1: 1 kΩ series resistor, 0805.
- C1: 100 nF capacitor from output to ground, 0805. Choose a part rated for at least 10 V; capacitance tolerance affects the response.
- J1 and J2: two-pin, 2.54 mm pitch headers. Pin 1 carries the signal; pin 2 is ground.
- Operating conditions: a known external 0–1 V signal source with negligible output resistance, and an external 1 MΩ output load. Both share the board's ground.
- Board: a 30 mm × 20 mm, two-layer practice board, with connector locations chosen for access.
Throughout this tutorial, 0805 means imperial 0805 (metric 2012), approximately 2.0 mm × 1.25 mm—not metric 0805.
There is no onboard power supply, MCU, or amplifier. The signal drives the passive network. With an ideal source and no load, fc = 1 / (2πRC) ≈ 1591.55 Hz; the stated 1 MΩ load changes that result slightly. Real tolerances and source impedance must be considered.
Step 1: Create a New Project
Choose New project on the desktop start page. Name it RC-Filter, choose a local folder, and open the schematic from the project tree. If you completed Quick Start, continue with that project.
Step 2: Describe Your Circuit
Open chat, choose a supported model, and select Plan. Send:
Plan a passive RC low-pass filter on a 30 mm × 20 mm two-layer board.
R1 is 1 kΩ and C1 is 100 nF, both 0805.
Use two-pin 2.54 mm headers for J1 (input) and J2 (output).
J1 pin 1 is IN; J1 pin 2 is GND.
R1 connects IN to OUT. C1 connects OUT to GND.
J2 pin 1 is OUT; J2 pin 2 is GND.
Assume an external 0–1 V signal with negligible source resistance
and an external 1 MΩ load, with a common ground.
No onboard supply, MCU, amplifier, or voltage source.
First plan the schematic and footprint choices only.
Do not place or route the board yet.
For an existing Quick Start schematic, ask for review of those connections rather than creation of a second circuit.
Step 3: Review the Plan
Check the proposed topology, values, connector orientation, and exact packages. Answer unresolved questions. Use Adjust Plan if the design adds unnecessary parts or changes the scope; choose Approve only when the schematic work is what you want.
Step 4: Create or Review the Schematic
After execution, inspect the actual schematic:
- IN reaches R1 and J1 pin 1.
- OUT joins R1, C1, and J2 pin 1.
- GND joins C1 and pin 2 of both connectors.
- Wires and labels create those nets; crossing lines alone are not proof of a junction.
- Values, references, and footprint assignments match the plan.
Save and run ERC. Investigate warnings rather than adding a fictitious power source. ERC does not calculate the cutoff or prove the circuit meets a performance requirement.
If desired, use Simulation with the stated external source and load in a bench, not as added product components. A run with no evaluated assertions is not a PASS.
Step 5: Set Board Parameters
Verify each symbol's footprint and pin-to-pad mapping before updating the PCB. Inspect the resistor and capacitor pad sizes and the headers' pitch, hole sizes, and pin-1 markings. Use Components or Component Editor if a suitable verified part is missing.
Use Update PCB from Schematic to bring the reviewed circuit into the board editor. Confirm four footprints and the intended net connections.
In Board Setup, set the stackup to two copper layers, F.Cu and B.Cu. Choose rules appropriate to your intended fabricator. For practice, 0.25 mm traces and 0.20 mm clearance are reasonable starting settings, not a universal manufacturing specification.
Select Edge.Cuts in the layer controls. Use Draw Rectangles for the 30 mm × 20 mm boundary, or Draw Lines with endpoints snapped together. Inspect the dimensions and confirm one closed outline with no gaps or overlapping segments. A silkscreen rectangle is not a board outline.
Step 6: Place Components
Place J1 and J2 where cables can reach them, with clear signal/ground markings. Put R1 along the input-to-output path and C1 near the output connection, with a short ground return. Keep pads and copper clear of the board edge under your chosen rules.
Manual placement is sufficient for this exercise. If you choose Trace's advanced layout engine, review fixed placements, classification, preflight, and the displayed budget in Placement and routing. A request to move one part is not permission for a whole-board layout.
Step 7: Route Traces
Select F.Cu and the intended track width. Use Route tracks (X by default; the action is Route Single Track) to start at a pad and follow its unrouted connection to the matching pad. Click to place segments and finish on the destination pad; press Escape to leave routing.
Route IN, OUT, and GND according to the schematic. Manual routing makes this small circuit easy to inspect. Ground must connect both headers and C1; a copper zone counts only after it is filled and its connectivity is checked.
If you request automated routing, choose the intended routing scope explicitly and inspect the result. Routing completion does not establish electrical performance or fabrication readiness.
Step 8: Run DRC
Save the board. In the native Full interface, open Inspect → Design Rules Checker and click Run DRC. Select findings to locate the affected objects and resolve clearance, edge, hole, and unrouted-connection issues. Refill any zones after changes and run DRC again.
Compare the saved board with the schematic: connector pin 1 is signal, pin 2 is ground, and C1 connects OUT to GND. Review component orientation and readable silkscreen. A clean DRC result checks configured rules; it does not prove the selected rules are sufficient or certify the assembly.
Step 9: Export for Manufacturing
Follow Exporting to generate Gerber and drill files, plus the BOM and any assembly files your process needs.
Open the exported layers in a viewer. Verify the closed outline, copper connections, drill locations, layer selection, and dimensions. Reopen the saved project and check that the native design and .xo drawing files are intact.
Only consider fabrication after reviewing the actual outputs and your fabricator's requirements. This tutorial does not provide a pre-qualified manufacturing fixture or a guaranteed electrical result.
If Something Goes Wrong
Stop the task and inspect the current design before repeating an edit. Use the supported history and recovery workflow for your product; chat Stop is not CAD undo. An uncertain response needs investigation, not a duplicate request.